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ics for tv 1 AN5095K single chip ic with i 2 c bus interface for pal/ntsc color tv system n overview the AN5095K is an ic in which pal/ntsc color television signal processing circuits are inte- grated into a single chip. also, since the i 2 c bus interface is built in the ic, the rationalization of set production line can be realized. n features built- in video if circuit, sound if circuit, video signal processing circuit, color signal processing circuit, sync. signal processing circuit suitable for pal/ntsc/av-ntsc/m-ntsc sys- tems 6 db improved sound s/n (compared with the an5195k-b/-c) package: 64-sdip, supply voltage: 5 v, 9 v n applications television and televideo unit: mm sdip064-p-0750b 64 33 132 1.778 19.05 0.25 +0.1 C0.05 0.5 +0.1 C0.05 0 to 15 5.2 max. 0.7 min. (3.3) 3.850.2 17.00.2 (1.0) (1.641) seating plane 58.40.3
2 AN5095K ics for tv n block diagram -(r-y) in 64 r-clamp filter 1 -(b-y) in 63 g-clamp filter 2 scp 62 b-clamp filter 3 -(r-y) out 61 killer 4 -(b-y) out 60 killer out 50 hz/60 hz out secam det. out 5 secam interface 59 apc 6 v out 58 4.43 mhz 7 ver. clamp 57 3.58 mhz 8 h-out 56 bl det. 9 x-ray protect 55 ys-in 10 h-osc 54 r-in 11 afc1 53 g-in 12 afc2 52 b-in 13 v cc2 51 v cc1 (9 v) 14 fbp in 50 r-out 15 gnd (v, c, j) 49 g-out 16 c-in 48 b-out 17 v cc3 (v, c, j) 47 hor. lock det. 18 sync. in 46 gnd (r, g, b/dac) 19 y-in 45 acl 20 video out 44 sda 21 v-osc 43 scl 22 apc1 42 v cc3 (vif/sif) 23 det. out 41 vif1 in 24 int. video2 40 vif2 in 25 sif apc 39 gnd (vif/sif) 26 int. video1 38 rf agc 27 if agc 37 audio out 28 sif1 in 36 de-emphasis 29 sif2 in 35 aft 30 sif regulator filter 34 33 ext. video in 31 sif3 in/sharpness de-coupling 32 saturation ve r. out hor. reg. scp shut down hor. sync. sep. ve r. sync. sep. black expansion cv clamp y contrast y clamp h-vco vco h-blk afc1 apc1 aft video sw * 1-bit afc2 bgp sharpness hvblk ve r. count down her. count down 50 hz/60 hz detect hor. lock det. brightness * 7-bit * 6-bit * 1-bit ( * 6-bit) 1-bit 2-bit apc killer, 50 hz/60 hz secam det. sw contrast r drive 7-bit cutoff 8-bit g cutoff 8-bit b drive 7-bit cutoff 8-bit chroma vco cw generate killer ident acc det. i 2 c bus interface acc amp. r-clamp g-clamp b-clamp tint 1h ff lpf system sw matrix r-y demod. + / - b-y demod. pn/s sw r, g, b sw g-y if amp. if agc asw level adjust sif detect vif detect rf agc * 6-bit * 3-bit * 1-bit * 1-bit * 6-bit * 7-bit * 6-bit * 9-bit * 2-bit sw out dac out * 2-bit (50 hz/ 60 hz) * 3-bit * 1-bit de- emphasis phase shift limiter pre-amp. vco lpf sif sw
3 ics for tv AN5095K n pin descriptions pin no. description 1 (r) clamp 2 (g) clamp 3 (b) clamp 4 killer filter 5 killer out, 50 hz/60 hz out, secam det. out 6 chroma apc filter 7 chroma vco (4.43 mhz) 8 chroma vco (3.58 mhz) 9 black level det./blank off sw 10 y s input (fast blanking) 11 external r-input 12 external g-input 13 external b-input 14 v cc1 15 r-output 16 g-output 17 b-output 18 hor.lock detect 19 gnd (r, g, b/i 2 c/dac) 20 acl 21 sda 22 scl 23 v cc3 -1 (vif/sif) 24 vif1 input 25 vif2 input 26 gnd (vif/sif) 27 rf agc output 28 audio output 29 de-emphasis 30 aft output 31 external video input 32 dc de-coupling filter pin no. description 33 sif3 input/sharpness 34 sif regurator filter 35 sif2 input 36 sif1 input 37 if agc filter 38 internal videol input 39 sif apc filter 40 internal video2 input 41 vif detect output 42 vif apc 1 filter 43 vif vco (f p /2) 44 video output 45 y-input 46 h, v sync. input 47 v cc3 -2 (chroma/jungle/dac) 48 chroma input/black expansion start 49 gnd (video/chroma/jungle) 50 fbp input 51 v cc2 (hor. stability supply) 52 afc2 filter 53 afc1 filter 54 hor. vco (32 f h ) 55 x-ray protection input 56 hor. pulse output 57 ver. sync. clamp 58 ver. pulse output 59 secam interface 60 -(b-y) output 61 -(r-y) output 62 sandcastle pulse output 63 -(b-y) input 64 -(r-y) input
4 AN5095K ics for tv parameter symbol rating unit supply voltage v cc v cc1 (14) 10.5 v v cc3 (23, 47) 6.0 supply current i cc i 14 67 ma i 23 + 47 126 i 51 27 power dissipation *2 p d 1 480 mw operating ambient temperature *1 t opr - 20 to + 70 c storage temperature *1 t stg - 55 to + 150 c n absolute maximum ratings n recommended operating range parameter symbol range unit supply voltage v cc1 8.1 to 9.9 v v cc3 4.5 to 5.5 terminal voltage v 5 0 to 6 v v 10 0 to 6 v 11 0 to 6 v 12 0 to 6 v 13 0 to 6 v 21 0 to 6 v 22 0 to 6 v 27 0 to 10.5 v 30 0 to 10.5 v 48 0 to v 14 v 50 0 to v 47 v 55 0 to 2 v 59 0 to v 14 supply current i 51 10 to 25 ma circuit current i 15 - 3.2 to + 0.6 ma i 16 - 3.2 to + 0.6 i 17 - 3.2 to + 0.6 i 41 - 0.8 to + 0.8 i 44 - 1.1 to + 0.4 i 46 - 0.8 to + 0.1 note) * 1: except for the operating ambient temperature, and storage temperature, all ratings are for t a = 25 c. * 2: the power dissipation shown is for the ic package in free air at t a = 70 c.
5 ics for tv AN5095K n electrical characteristics at t a = 25 c parameter symbol conditions min typ max unit power supply supply current 1 i 14 current at v 14 = 9 v 394857ma supply current 2 i 23 current at v 23 = 5 v 7 10 13 ma supply current 3 i 47 current at v 47 = 5 v 496377ma stabilized supply voltage v 51 voltage at i 51 = 15 ma 5.8 6.5 7.2 v stabilized supply current i 51 current at v 51 = 5 v 2 5 7 ma stabilized supply input resistance r 51 dc measurement, slant between at 1 5 10 w i 51 = 10 ma and 25 ma vif circuit typical input; f p = 38.9 mhz, v in = 90 db m , dac data are typical video detection output (typ.) v po modulation m = 87.5%, data 0b = 44 1.7 2.1 2.5 v[p-p] video detection output (max.) v pomax 0b = 74 1.9 2.6 3.3 v[p-p] video detection output (min.) v pomin 0b = 04 1.1 1.6 2.1 v[p-p] video detection output- f pc frequency which becomes - 3 db for 5.5 8 12 mhz frequency characteristic 1 mhz output synchronous peak value voltage v sp synchronized peak value voltage at 1.6 2.0 2.4 v v[p-0] measurement apc high-level pull-in range f pph high-pass side pull-in range 1.0 2.0 ? mhz (difference from f p = 38.9 mhz) apc low-level pull-in range f ppl low-pass side pull-in range ?- 2.0 - 1.0 mhz (difference from f p = 38.9 mhz) rf agc delay point adjustable d v rfdp delay point in which data are 0a = 00 75 ? 95 db m range * 1 to 3f (input at v 27 = approx. 6.5 v) vco free-running frequency d f p dispersion without v in - 1.2 0 1.2 mhz v 37 (if agc) = 0 v (measurement of the difference from 38.9 mhz) rf agc maximum sink current i rfmax max. current ic can sink when pin 27 1.5 3.0 ? ma is low rf agc minimum sink current i rfmin ic leak current at which pin 27 is high - 50 0 50 m a note) * 1 to * 9: refer to "explanation of test methods". n recommended operating range (continued) parameter symbol range unit circuit current i 56 - 6.4 to + 0.1 ma i 58 - 0.8 to + 0.1 i 59 - 0.3 to + 0.1 note) do not apply external currents or voltages to any pins not specifically mentioned. for circuit currents, ' + ' denotes current flowing into the ic, and ' - ' denotes current flowing out of the ic.
6 AN5095K ics for tv n electrical characteristics at t a = 25 c (continued) parameter symbol conditions min typ max unit vif circuit (continued) typical input; f p = 38.9 mhz, v in = 90 db m , dac data are typical aft discrimination sensitivity * 2 m aft d f = 25 khz 40 57 75 mv/khz aft center voltage v aft v 30 at v in without input 4.0 4.5 5.0 v aft maximum output voltage v aftmax v 30 at f = f p - 500 khz 7.8 8.1 8.7 v aft minimum output voltage v aftmin v 30 at f = f p + 500 khz 0.3 0.8 1.0 v detection output resistance r o41 dc measurement, 70 120 170 w i o = - 0.4 v to - 1.0 ma sif circuit typical input; f s = 6.0 mhz, f m = 400 hz, v in = 90 db m audio detection output v sop36 d f = 50 khz 0.90 1.15 1.40 v[rms] (pal, sif1) 0b-d3 = 0 audio detection output v sop35 d f = 50 khz 0.90 1.15 1.40 v[rms] (pal, sif2) 0b-d3 = 0 audio detection output v sop33 d f = 50 khz 0.90 1.15 1.40 v[rms] (pal, sif3) 0b-d3 = 0 audio detection output r sn/p d f = 25 khz - 2.5 - 0.5 1.5 db ntsc/pal 0b-d3 = 1, ratio to pal (v sop36 ) audio detection output d v sop f s = 5.5 mhz and 6.0 mhz - 30 3 db linearity ratio to 6.5 mhz sif pull-in range f snh pull-in range of high-pass side 4.8 5.0 ? mhz ntsc (4.5 mhz) (4.5m) sif pull-in range f snl pull-in range of low-pass side ? 4.0 4.2 mhz ntsc (4.5 mhz) (4.5m) sif pull-in range f sph pull-in range of high-pass side 5.8 6.0 ? mhz pal (5.5 mhz) (5.5m) sif pull-in range f spl pull-in range of low-pass side ? 5.0 5.2 mhz pal (5.5 mhz) (5.5m) sif pull-in range f sph pull-in range of high-pass side 6.3 6.5 ? mhz pal (6.0 mhz) (6.0m) sif pull-in range f spl pull-in range of low-pass side ? 5.5 5.7 mhz pal (6.0 mhz) (6.0m) sif pull-in range f sph pull-in range of high-pass side 6.8 7.0 ? mhz pal (6.5 mhz) (6.5m) sif pull-in range f spl pull-in range of low-pass side ? 6.0 6.2 mhz pal (6.5 mhz) (6.5m) de-emphasis terminal r 29p impedance of pin 29 at pal 32 40 48 k w output resistance (pal) de-emphasis terminal r 29n impedance of pin 29 at ntsc 48 60 72 k w output resistance (ntsc) note) * 1 to * 9: refer to "explanation of test methods".
7 ics for tv AN5095K n electrical characteristics at t a = 25 c (continued) parameter symbol conditions min typ max unit av sw circuit video sw voltage gain g vsw f = 1 mhz, v in = 1 v[p-p] 5.7 6.7 7.7 db video sw-frequency f vsw frequency to become - 3 db from f = 810 ? mhz characteristic 1 mhz, v in = 0.714 v[0-p] video sw external input terminal v 31 dc measurement 1.7 2.0 2.3 v voltage video sw external output dc v 44e dc measurement, 4.2 4.8 5.4 v voltage 03-d7 = 1, 0b-d7 = 1 video sw external input resistance r i31 dc measurement 44 56 68 k w video sw output resistance r o44 dc measurement, 110 150 190 w i o = - 0.6 ma to - 1.0 ma video sw internal clamp terminal v 38, 40 dc measurement, 1.4 1.7 2.0 v voltage i in = - 1.0 ma video sw internal output dc v 44i dc measurement 3.7 4.3 4.9 v voltage audio sw voltage gain g asw data 03-d7 = 1, 0b-d7 = 1, - 10 1 db (input from outside) f = 400 hz, v in = 1 v[p-p] audio sw output dc voltage v 28 dc measurement 3.7 4.2 4.7 v audio sw output resistance r o28 dc measurement 350 450 550 w video signal processing circuit typical input; 0.6 v[p-p] (v bw = 0.42 v[p-p] stair-step) at g-out video output (typ.) v yo data 03 = 20 (typ.) (contrast) 2.0 2.5 3.0 v[0-p] video output (max.) v yomax data 03 = 3f (max.) 4.1 5.0 5.9 v[0-p] video output (min.) v yomin data 03 = 00 (min.) 0.15 0.50 1.00 v[0-p] contrast variable range y cmax/min 03 = 3f 15 20 25 db 03 = 00 video frequency characteristic f yc pin 33 = 5 v (sharpness), frequency to 5 . 5 6.0 ? mhz become - 3 db from f = 0.2 mhz picture quality variable range y smax/min v 33 = 7v f = 3.8 mhz 91317db v 33 = 5v pedestal level (typ.) v ped data 02 = 40 (typ.) (brightness) 2.0 2.5 3.0 v pedestal variable width d v ped difference between data 02 = 00 and 7f 2.15 2.75 3.35 v brightness control sensitivity d v brt average amount of change per 1-step 14 20 26 mv/step between data 02 = 30 and 50 video input clamp voltage v yclp pin 45 clamp voltage 3.2 3.7 4.2 v acl sensitivity acl amount of change of y-out, when v 20 2.7 3.2 3.7 v/v = 3.0 v ? 3.5 v blanking level v ybl blanking pulse dc voltage ? 1.0 1.5 v
8 AN5095K ics for tv n electrical characteristics at t a = 25 c (continued) parameter symbol conditions min typ max unit video signal processing circuit (continued) typical input; 0.6 v[p-p] (v bw = 0.42 v[p-p] stair-step) at g-out service sw * v sth voltage at which vertical output stops ?? 0.3 v threshold voltage when pin 20 (acl) voltage is decreased dc restoration ratio t dc apl10% to 90% 90 100 110 % t dc = d ac - d dc 100 d ac video input clamp current i yclp dc measurement; sink current inside of ic 61116 m a pedestal difference voltage d v ipl pedestal difference voltage of r, g, b-out - 0.2 0 0.2 v brightness voltage tracking d t bl ratio of r, g, b-out fluctuation level 0.9 1.0 1.1 time for data 02 (bright) = 20 to 60 video voltage gain relative ratio d g yc output ratio of r, b-out against g-out 0.8 1.0 1.2 time video voltage gain tracking d t cont ratio of gain of r, g, b-out for data 03 0.9 1.0 1.1 time/ (contrast) = 10 to 30 time color signal processing circuit burst 150 mv[p-p] (pal), reference is b-out color-difference output (typ.) v co input; color bar 2.9 3.7 4.5 v[p-p] data 00 = 20 (typ.), 03 = 20 (typ.) color-difference output (max.) v comax data 03 = 3f, amplitude of one side 2.6 3.3 ? v[0-p] 03 = 20 color-difference output (min.) v comin data 00 = 00, 03 = 20 ?? 100 mv[p-p] contrast adjustable range c cmax/min 03 = 3f 00 = 20 15 20 25 db 03 = 00 acc characteristic 1 acc1 burst 150 mv[p-p] ? 300 mv[p-p] 0.9 1.0 1.2 time acc characteristic 2 acc2 burst 150 mv[p-p] ? 30 mv[p-p] 0.8 1.0 1.2 time ntsc tint center dq c the difference from data 01 = 20 at - 7 0 7 step which tint is adjusted to center ntsc tint adjustable range 1 dq 1 input; rainbow data 01 = 3f 30 50 65 deg ntsc tint adjustable range 2 dq 2 input; rainbow data 01 = 00 - 65 - 50 - 30 deg color-difference output ratio (r) r/b input; rainbow for both pal/ntsc 0.46 0.56 0.66 time color-difference output ratio (g) g/b input; rainbow for both pal/ntsc 0.28 0.34 0.40 time color-difference output angle (r) e r input; rainbow for both pal/ntsc 78 90 102 deg color-difference output angle (g) e g input; rainbow for both pal/ntsc 224 236 248 deg pal color killer tolerance v killp 0 db = 150 mv[p-p] - 57 - 44 - 34 db ntsc color killer tolerance v killn 0 db = 150 mv[p-p] - 57 - 44 - 34 db apc high-lebel pull-in range f cph both pal/ntsc 450 700 ? hz apc low-lebel pull-in range f cpl both pal/ntsc ?- 700 - 450 hz color killer detection output v kc v 5 , killer out at which chroma input 4.5 5.0 ? v voltage (color) data 0a-d6 = 0, 0a-d7 = 1 note) *: since pin 20 is also used partly as service sw when used as acl, a sufficient care must be taken so as not to become v 20 < 0.9 v in carrying out set design.
9 ics for tv AN5095K n electrical characteristics at t a = 25 c (continued) parameter symbol conditions min typ max unit color signal processing circuit (continued) burst 150 mv[p-p] (pal), reference is b-out color killer detection output v kbw v 5 , killer out at which chroma input 0 0.1 0.5 v voltage (b & w) data 0a-d6 = 0, 0a-d7 = 1 demodulation output -(b-y) v db input; color bar measured at pin 60 555 695 835 mv[p-p] for both pal/ntsc demodulation output -(r-y) v dr input; color bar measured at pin 61 430 540 650 mv[p-p] for both pal/ntsc demodulation output angle e (b-y) e r db b-y axis out of phase - 6 0 6 deg demodulation output angle e (r-y) e r dr b-y axis phase difference 84 90 96 deg cw output level (4.43 mhz) * 3 v cwp ac component, when vco is set at 250 350 450 mv[p-p] 4.43 mhz cw output level (3.58 mhz) * 3 v cwn ac component, when vco is set at ?? 50 mv[p-p] 3.58 mhz cw output level period t cw period in which cw is outputted at 1.31 1.41 1.51 ms (secam) * 3 secam, pal secam judgment current i secam the minimum value to take out current 50 100 150 m a from pin 59 to discriminate as secam secam judgment output v se v 5 , det. ou t, when secam signal input 4.5 5.0 ? v data 0a-d6 = 1, 0a-d7 = 0, secam pal/ntsc dc level v 59pn v 59 dc level at pal/ntsc 0.8 1.3 1.65 v secam dc level v 59s v 59 dc level at secam 4.1 4.6 5.1 v rgb processing circuit dac data are typicals drive adjusting range g dv ac change amount for r, b-out between 567db drive adjustment max. and min. offset adjusting range v cut-off dc change amount for r, g, b-out 2.2 2.5 2.8 v between offset adjustment max. and min. y s threshold voltage v yson minimum dc voltage at which y s 1.0 ?? v turns on y s threshold voltage v ysof maximum dc voltage at which y s ?? 0.4 v turns off external r, g, b pedestal d v epl y s = 1 v is applied - 200 0 200 mv difference voltage internal and external pedestal d v pl/ie internal part ? external part - 200 0 200 mv difference voltage external r, g, b output voltage v ergb input 0.7 v[p-p], contrast 03 = 20 (typ.) 1.8 2.2 2.7 v[p-p] external r, g, b output difference d v ergb input 0.7 v[p-p], contrast 03 = 20 (typ.) 0.8 1.0 1.2 time voltage external r, g, b contrast variable ec max/min 03 = 3f 12 17 22 db range 03 = 00 note) * 1 to * 9: refer to "explanation of test methods".
10 AN5095K ics for tv n electrical characteristics at t a = 25 c (continued) parameter symbol conditions min typ max unit rgb processing circuit (continued) dac data are typicals external r, g, b frequency f rgbc input 0.2 v[p-p] 8 10 ? mhz characteristic internal and external r, g, b v e/i external part 0.7 v[p-p]/internal part 0.78 0.92 1.06 time output voltage ratio 0.6 v[p-p] input, contrast 03 = 20 (typ.) synchronizing signal processing circuit horizontal free run frequency f ho without sync. signal input 15.33 15.63 15.93 khz horizontal output pulse duty cycle t ho upward pulse duty cycle 31 37 43 % horizontal pull-in range f hp difference from f h = 15.625 khz 500 650 ? hz pal horizontal free run frequency f vo-p data 01-d7 = 1, 02-d7 = 0, forced 48 50 52 hz 50 hz mode, without sync. signal input ntsc vertical free run frequency f vo-n data 01-d7 = 1, 02-d7 = 1, forced 58 60 62 hz 60 hz mode, without sync. signal input vertical output pulse width t vo for both pal/ntsc 9 10 11 1/fh pal vertical pull-in range f vpp f h = 15.625 khz, forced 50 hz mode 46 ? 54 hz ntsc vertical pull-in range f vpn f h = 15.75 khz, forced 60 hz mode 56 ? 64 hz horizontal high-level output voltage v 56h high-level dc voltage 2.8 3.1 3.4 v horizontal low-level output voltage v 56l low-level dc voltage ?? 0.3 v vertical high-level output voltage v 58h high-level dc voltage 3.9 4.2 4.5 v vertical low-level output voltage v 58l low-level dc voltage ?? 0.3 v screen center variable range d t hc change amount of phase difference between 2.6 3.2 4.4 m s sync. and h-out of data 0b = 40 to 47 overvoltage protection operation v x-ray the pin 55 minimum voltage at which 0.60 0.68 0.76 v voltage h-out does not appear any longer vertical frequency f 50 vertical frequency at which v 5 becomes 47 ? 55 hz discrimination (50) low ( < 0.5 v) vertical frequency f 60 vertical frequency at which v 5 becomes 57 ? 63 hz discrimination (60) high ( > 4.5 v) synchronous signal clamp voltage v 46 v 46 clamp voltage 1.1 1.4 1.7 v horizontal output start voltage v fhs the minimum v 50 at f 0 > 10 khz 3.4 4.2 5.0 v and horizontal oscillation output is higher than 1 v[p-p] i 2 c interface sink current when ack i ack the maximum value of pin 21 sink 1.5 2.0 5.0 ma current at ack scl, sda signal high level input v ihi 3.1 ?? v scl, sda signal low level input v ilo ?? 0.9 v allowable maximum input f imax ?? 100 kbit/s frequency
11 ics for tv AN5095K n electrical characteristics at t a = 25 c (continued) design reference data note) the characteristics listed below are theoretical values based on the ic design and are not guaranteed. parameter symbol conditions min typ max unit vif circuit typical input; f p = 38.9 mhz, v in = 90 db m input sensitivity v ps input level at which v po1 becomes - 3 db ? 45 ? db m maximum allowable input v pmax input level at which v po1 becomes + 1 db ? 110 ? db m sn ratio sn p 50 ?? db differential gain dg p ?? 5% differential phase dp p ?? 5 deg black-noise detection level * 4 d v bn difference from sync. peak value ?- 45 ? ire black-noise clamp level * 4 d v bnc difference from sync. peak value ? 45 ? ire rf-agc operation sensitivity g rf input level difference, when v 27 = 1 v 0.5 ? 3.0 db goes to 7 v vco switch-on drift d f pd frequency drift from 5 sec. to 5 min. after ?? 200 khz sw-on inter modulation * 5 im v fc - v fp = - 2 db, v fs - v fp = - 12 db 46 ?? db rf-agc adjustment sensitivity s rf output voltage in data 1-step, 1 ? 4 v/step average change amount of v 27 aft offset adjustment sensitivity s aft output voltage in data 1-step, 0.1 ? 0.3 v/step average change amount of v 30 video detection output fluctuation d v p/v v cc = 10% ?? 15 % with v cc video detection output- d v p/t t a = - 20 c to + 70 c ?? 10 % temperature characteristics input resistance (pin 24, pin 25) r i24,25 f = 38.9 mhz ? 1.2 ? k w input capacitance (pin 24, pin 25) c i24,25 f = 38.9 mhz ? 4.0 ? pf sound-if output level v sif f s = 38.9 mhz - 6.0 mhz, p/s = 20 db 90 ? 110 db m vco control sensitivity b p d v 42 = 0.1 v 2.0 ? 3.5 khz/mv vco adjustment range f vco free-running frequency change width 3 ? 5 mhz at data 0c = 00 to 7f rf-agc delay point-temperature d v dp/t t a = - 20 c to + 70 c ?? 5db characteristics vco free-running frequency- d f p/t t a = - 20 c to + 70 c ? 300 ? khz temperature characteristics aft center frequency-temperature d f aft/t input frequency at which aft output ? 300 ? khz characteristics voltage becomes 4.5 v, t a = - 20 c to + 70 c external mode output dc voltage v 41ext output dc voltage at av-sw 0.5 1.0 1.8 v outside mode note) * 1 to * 9: refer to "explanation of test methods".
12 AN5095K ics for tv parameter symbol conditions min typ max unit sif circuit typical input; f s = 6.0 mhz, f m = 400 hz, v in = 90 db m input limiting level v lim input level, when v sop becomes - 3 db ?? 50 db m am rejection ratio amr am = 30% 55 ?? db total harmonic distortion thd d f = 50 khz ?? 1.0 % sn ratio sn a d f = 50 khz, f m = 400 hz, on/off 55 ?? db audio output fluctuation with v cc d v s/v v cc = 10% ?? 10 % audio output - temperature d v s/t t a = - 20 c to + 70 c ?? 10 % characteristics sif input resistance r i35 dc measurement ? 31.5 ? k w sif input resistance r i36 dc measurement ? 31.5 ? k w av-sw circuit video-sw crosstalk c tvii f = 1 mhz, v in = 1 v[p-p], ??- 55 db (inside ? inside) inside ? inside video-sw crosstalk c tvei f = 1 mhz, v in = 1 v[p-p], ??- 55 db (outside ? inside) inside ? outside, outside ? inside audio-sw crosstalk c taii f s = 6.5 mhz, f m = 400 hz, v in = 1 v[p-p], ??- 60 db (inside ? inside) f s = 6.5 mhz, f m = 1.0 khz, v in = 1 v[p-p] video signal processing circuit typical input; 0.6 v[p-p] (v bw = 0.42 v[p-p] stair-step) at g-out black level expansion 1 * 6 v bl1 input: all black, difference between - 100 0 100 mv pin 9 = 9 v and open (with rc) black level expansion 2 * 6 v bl2 input: all black, difference between 400 700 1000 mv pin 9 = 3 v and 9 v black level expansion 3 * 6 v bl3 input: approx. 20 ire, voltage 100 300 500 mv difference between pin 9 = open and 9 v at 03 (contrast) = 3f (max.) contrast change by sharpness d v cs y-out output difference at sharpness - 300 0 300 mv between max. and min. brightness change by sharpness d v bs pedestal level dc difference at sharpness - 250 0 250 mv between max. and min. input dynamic change v imax 03 (contrast) = 20 (typ.) ?? 1.6 v[p-p] y-signal sn-ratio sn y 03 (contrast) = 3f (max.) 53 ?? db black level expansion start point *6 v bls start point at v 48 = 4.5 v 37 42 47 ire video output fluctuation with v cc d v y/v v cc1 = 9 v (allowance: 10%) ?? 15 % video output - temperature d v y/t t a = - 20 c to + 70 c ?? 10 % characteristics acl start point v acl v 20 at which the output amplitude 3.4 3.7 4.0 v becomes 90% when acl terminal (v 20 ) is decreased from 5 v n electrical characteristics at t a = 25 c (continued) design reference data (continued) note) the characteristics listed below are theoretical values based on the ic design and are not guaranteed. note) * 1 to * 9: refer to "explanation of test methods".
13 ics for tv AN5095K n electrical characteristics at t a = 25 c (continued) design reference data (continued) note) the characteristics listed below are theoretical values based on the ic design and are not guaranteed. parameter symbol conditions min typ max unit color signal processing circuit burst 150 mv[p-p] (pal), reference is b-out demodulation output residual carrier v car1 2f sc level of pin 60 and pin 61 ?? 30 mv color-difference output residual v car2 2f sc level of pin 15, pin 16 and pin 17 ?? 50 mv carrier vco free-running frequency (pal) f cp difference from f = 4.433619 mhz - 300 ? 300 hz vco free-running frequency (ntsc) f cn difference from f = 3.579545 mhz - 300 ? 300 hz f co fluctuation with v cc d f c /v cc v cc1 = 9 v (allowance: 10%), - 300 ? 300 hz v cc3 = 5 v (allowance: 10%) static phase error (pal) dq p tint gap at d f c = - 300 hz to + 300 hz ?? 5 deg/ change 100 hz static phase error (ntsc) dq n tint gap at d f c = - 300 hz to + 300 hz ?? 5 deg/ change 100 hz pal/ntsc ratio r p/n output amplitude ratio between pal 0.7 1.0 1.3 time and ntsc line crawling d v pal pin 61: output amplitude difference ?? 50 mv per 1h at -(r-y) terminal color-difference output bandwidth f cc band to become - 3 db 1.0 ?? mhz color-difference output fluctuation d v c/v v cc1 = 9 v (allowance: 10%), ?? 15 % with v cc v cc3 = 5 v (allowance: 10%) color-difference output - d v c/t t a = - 20 c to 70 c ?? 15 % temperature characteristics pal/ntsc output impedance r o60,61pn dc measurement 400 510 620 w secam output impedance r o60,61s dc measurement 100 ?? k w color, black & white dc d v cbw pedestal voltage difference between - 60 0 60 mv difference voltage with and without burst signal (c-y)/y ratio *7 r c/y color bar input, b-out contrast typ. 0.9 1.2 1.5 v[0-p]/ color data 00 = 30 v[0-p] rgb processing circuit y s change-over speed f ys f ys , when y s input is 3 v[0-p] and 7 ?? mhz output level is - 3 db outside r, g, b input dynamic v dext contrast max. data 03 = 3f 1.0 ?? v[p-p] range inside and outside crosstalk ct rgb leakage at f = 1 mhz, 1 v[p-p], ??- 50 db y s = 5 v synchronizing signal processing circuit lock detection output voltage v ld v 18 at horizontal afc lock 5.7 6.3 6.9 v lock detection charge and i ld dc measurement 0.6 0.8 1.1 ma discharge current note) * 1 to * 9: refer to "explanation of test methods".
14 AN5095K ics for tv n electrical characteristics at t a = 25 c (continued) design reference data (continued) note) the characteristics listed below are theoretical values based on the ic design and are not guaranteed. parameter symbol conditions min typ max unit synchronizing signal processing circuit (continued) fbr (r, g, b) slice level v fbp pin 50 minimum voltage at which 0.4 0.75 1.1 v blanking is applied to r, g, b output fbp (afc2) slice level v fbph pin 50 minimum voltage in which 1.5 1.9 2.3 v afc2 operates horizontal afc mm h dc measurement 30 37 44 m a/ m s horizontal vco bb h b curve slant near f = 15.75 khz 1.4 1.9 2.4 hz/mv burst gate pulse position * 8 p bgp delay from h sync. rise for both pal/ 0.2 0.4 0.6 m s ntsc pal burst gate pulse width * 8 w bgpp 3.4 4.0 4.6 m s ntsc burst gate pulse width * 8 w bgpn 2.5 3.0 3.5 m s burst gate pulse output voltage v bgp pin 62 dc voltage during bgp period 4.5 4.7 4.9 v h blanking pulse output voltage v hblk pin62 dc voltage during h blanking 2.1 2.4 2.7 v pulse period v blanking pulse output voltage v vblk pin62 dc voltage during v blanking 2.1 2.4 2.7 v pulse period pal v blanking pulse width w vp pulse width at f = 15.625 khz 1.31 1.41 1.51 ms ntsc v blanking pulse width w vn pulse width at f = 15.73 khz 1.01 1.11 1.21 ms fbp allowable range *9 t fbp time from h-out rise to fbp center 12 ? 19 m s fbp maximum allowable input v afbp 2.5 ? 5.0 v voltage i 2 c interface bus free before start t buf 4.0 ?? m s start condition set-up time t su, sta 4.0 ?? m s start condition hold time t hd, sta 4.0 ?? m s low period scl, sda t low 4.0 ?? m s high period scl t high 4.0 ?? m s rise time scl, sda t r ?? 1.0 m s fall time scl, sda t f ?? 0.35 m s data set-up time (write) t su, dat 0.25 ?? m s data hold time (write) t hd, dat 0 ?? m s acknowledge set-up time t su, ack ?? 3.5 m s acknowledge hold time t hd, ack 0 ?? m s stop condition set-up time t su, sto 4.0 ?? m s note) * 1 to * 9: refer to "explanation of test methods".
15 ics for tv AN5095K explanation of test methods * 1: rf agc delay point adjusting range: d v rfdp in the case of vif gain reduction curve (figure 1), if the rf agc delay point adjustment dac (0 a) goes 00 to 3f, the internal comparison voltage changes by d v, and the delay point adjustment range is determined. * 2: aft discrimination sensitivity: m aft adjust dac (0c-d7) and dac (09) so that the aft output voltage (v 30 ) becomes approx. 4.5 v when f p = 38.9 mhz. measure d v 30 when f p = 38.9 mhz 25 khz. * 3: refer to " n technical information 4. 7) pal/ntsc, secam interface". * 4: black noise detection level: d v bn black noise clamp level: d v bnc * 5: inter modulation: im apply the signal of f p = 38.9 mhz, 90 db m and fix the voltage of pin 37 (if agc) under that condition. f p = 38.9 mhz, 82 db m f p = 38.9 mhz - 4.43 mhz, 80 db my input those 3 signals and measure 1.57 mhz component of the f p = 38.9 mhz - 6.0 mhz, 70 db m t detection output. im = 20log vieo component [rms] v 1.57 mhz [rms] parameter symbol conditions min typ max unit dac 3-bit, 6-bit, 7-bit dac dnle l 3,6,7 1lsb = { data (max.) - data (00) } 0.1 1.0 1.9 lsb/ /7, 63, 127 step 8-bit dac dnle l 8 1lsb = { data (ff) - data (00) } /255 0.1 1.0 1.9 lsb/ (7f ? 80 excluded) step 8-bit dac dnle (80) l 8-80 lsb = { data (ff) - data (00) } /255 0.1 1.0 2.9 lsb/ (7f ? 80) step aft dac overlap d step 8-bit of aft double-stage changeover overlap 27 32 37 step n electrical characteristics at t a = 25 c (continued) design reference data (continued) note) the characteristics listed below are theoretical values based on the ic design and are not guaranteed. 110 100 80 49 [v] 00 3f if agc terminal level vif input level [db m ] d v figure 1. gain reduction curve d v bnc d v bn v p figure 2. black noise rejection characteristic
16 AN5095K ics for tv n electrical characteristics at t a = 25 c (continued) explanation of test methods (continued) * 6: black level extension: v bl in the black level extension characteristics (figure 3), when the voltage of pin 9 (black level detection filter) is v cc1 = 9 v, the operation of the black level extension circuit is turned off and the characteristic becomes as shown by the line . also, if the voltage of pin 9 is set at 3 v, the black level extension forcibly comes to start and the characteristic becomes as shown by the line . when pin 9 is set by only r, c filter, the black level extension characteristic as shown by the line can be obtained. v bl3 shows an output level difference between the black extension is off and the normal operation when the video input level is constant in 20 ire. v bls is a point where the black extension comes to start and can be adjusted by the dc voltage of pin 48 (c in ). v 48 2.5 v 4.5 v 6.5 v start point 52 ire 42 ire 32 ire * 7: (c-y)/y ratio: rc/y c-y is the voltage from 0 level to the peak of b-out when color is typ. (00 = 20) and contrast is typ. (03 = 20). y is the voltage from the pedestal of contrast at typ. to 100 ire white level. * 8: burst gate pulse as shown in figure 4, the position of the burst gate pulse is the period from the rise time of the h-sync. signal of pin 46 to the rise time of bgp. * 9: fbp allowable range : t fbp figure 5 shows the relationship between hor. pulse and fbp. the phase delay from hor. pulse to fbp differs from set to set. this ic has an adjusting function for the screen center position. the phase range in which this function normally operate is t fbp . bgp (4 m s) p bgp w bgp h-sync. pin 62 scp output pin 46 sync. input figure 4. burst gate pulse t fbp pin 56 hor. pulse output pin 50 fbp input figure 5. fbp allowable range y output when operation is off ( y input) v bl1 v bls v bl3 v bl2 pedestal level y output figure 3. black level expansion characteristics
17 ics for tv AN5095K pin no. equivalent circuit description voltage 1 pin 1; primary color signal clamp pin (r) dc 2 pin 2; primary color signal clamp pin (g) approx. 7 v 3 pin 3; primary color signal clamp pin (b): for the clamp pulse, the internal clamp pulse (bgp) is used. 4 killer filter pin: dc filter pin of killer detection circuit (operates approx. 3.3 v for bgp period). killer turns on (without color output) at a voltage of 2.8 v or lower. 5 killer, 50 hz/60 hz, secam det. output pin: dc selective output by sw (i 2 c bus). low level the load resistance 33 k w should be connected 0.2 v to microcomputer v cc . high livel 5 v 6 apc filter pin: dc filter pin of apc detection circuit (operates approx. 2.5 v for bgp period). the detection sensitivity becomes high when the external resistance is high, (tend to be pulled-in easily. tend to be influ- enced by noise). stop apc circuit by short-circuiting 40 k w at secam. n terminal equivalent circuits 150 m a 300 w 300 w 9 v (v cc1 ) 0.01 m f brightness control c bgp pin 1, 2, 3 5 v (v cc3 ) killer det. circuit 2.8 v bgp 4 270 w 137 k w 2.5 v 1.0 m w 100 m a 3.3 v 0.47 m f 1 v 9 v 5 40 m a on of f 10 k w 175 w floating resistance to microcomputer 33 k w microcomputer v cc (5 v) 0.47 m f 5 v (v cc3 ) apc det. circuit bgp 6 270 w 40 k w sw 2.5 v r 7.5 k w 3.3 v 0.047 m f 2.2 m f 1 v vco circuit max. 1 ma b curve f c v 6
18 AN5095K ics for tv pin no. equivalent circuit description voltage 7 pin 7; chroma. oscillation pin (4.43 mhz) ac 8 pin 8; chroma. oscillation pin (3.58 mhz): f = f c either one of the oscillations of 4.43 mhz approx. or 3.58 mhz is performed by chroma. 0.7 v[p-p] oscilla tion pin. frequency changeover is carried out by 08-d7 bit of i 2 c bus. when 08-d7 = 0; i p1 , i p2 turn on, and 4.43 mhz oscillates when 08-d7 = 0; i n1 , i n2 turn on and 3.58 mhz oscillates the pattern from pin to oscillator should be as short as possible. 9 black level detection pin dc blanking off sw pin: approx. 5.1 v black level detection filter pin for black extension circuit. excluding the blanking period, holds the most black y level. the sensitivity that the black extension (area judged as black) comes work is variable by means of external r. when r is large, it responds to a small area. apply v cc (9 v) to pin 9 when stopping the black extension circuit. blanking is turned off when pin 9 is gnd (black extension is also off). 10 y s input pin: ac fast-blanking pulse input pin for external (pulse) analog r, g, b. on at a voltage over 1 v. off at a voltage under 0.4 v. n terminal equivalent circuits (continued) 500 m a 500 m a 100 m a 100 m a 7 8 100 m a dc 2.7 v 4.43 mhz dc 2.7 v 3.58 mhz c7 12 pf c8 15 pf i p1 i p2 i n2 i n1 9 v (v cc1 ) 5 v (v cc3 ) black expansion circuit to blanking circuit 75 k w 5.1 v 80 k w 10 k w 10 k w r 180 k w 9 80 m a 100 m a 4.7 m f -y 2.7 k w 10 9 v (v cc1 ) 30 k w 0.7 v 100 m a 50 m a to r, g, b output circuit from microcomputer
19 ics for tv AN5095K pin no. equivalent circuit description voltage 11 pin11; external r input pin ac 12 pin12; external g input pin 13 pin13; external b input pin: the output will change linearly depend- ing on the input level. 14 ? v cc1 (9 v typ.): dc output block of vif, sif circuit. 9 v av sw circuit. video circuit. rgb circuit. 15 pin15; r-out pin ac 16 pin16; g-out pin 17 pin17; b-out pin: blk level approx. 0.9 v. black (pedestal) level approx. 2.2 v. blanking can be released by setting pin 9 (black level detection pin) at 0 v. 18 horizontal synch. detection pin: dc the phase of horizontal sync. signal and when horizontal output pulse is detected and out- synchronous putted. approx. 6 v pin 18 becomes low if out of synchroniza- when tion. asynchronous color control becomes minimum and chroma approx. 0.3 v signal disappears in asynchronous state. pay attention to impedance when the voltage of pin 18 is utilized for microcomputer. (500 k w or higher z o is required) h sync. period when pin 56 is high: i 1 on when pin 56 is low: i 2 on 9 v (v cc1 ) to color circuit 200 m a 100 m a pin 11 12 13 bgp 9 v (v cc1 ) 100 m a c-out 500 m a 50 w pin 15 16 17 100 w 5 v (v cc3 ) 6.3 v (v cc2 ) 10 k w 12 k w 12 k w 18 50 m a 2.8 v to chroma circuit i 1 i 2 800 m a 800 m a z o 10 k w 0.022 m f 1 m w pin56 h-out pin46 h/v sync. in n terminal equivalent circuits (continued)
20 AN5095K ics for tv pin no. equivalent circuit description voltage 19 ? gnd: ? r, g, b circuit. dac, i 2 c circuit. 20 acl pin: dc if dc voltage of pin 20 is decreased from approx. 3 v the outside, the contrast is turned down. service sw. note) since pin 20 also serves as the service sw when used as alc, design the set so as not to allow v 20 < 0.9 v. 21 i 2 c bus data input pin ac (pulse) 22 i 2 c clock input pin ac (pulse) 23 ? v cc3 -1 (5 v typ.): dc for vif and sif circuitr. 5 v 30 k w 30 k w ack 5 v (v cc3 ) 21 100 k w 50 m a 100 k w 1.7 v to logic circuit data 1 k w from microcomputer 30 k w 30 k w 5 v (v cc3 ) 22 100 k w 50 m a 100 k w 1.7 v to logic circuit clock 1 k w from microcomputer n terminal equivalent circuits (continued) 9 v (v cc1 ) 20 5.9 v to contrast circuit 2.1 v 3.5 v 60 k w 6.9 k w 60 k w 2.3 v 2.3 v 1 v 6.9 k w 7.1 k w 7.1 k w 6.9 k w 100 m a 100 m a 100 m a 4.7 m f contrast control
21 ics for tv AN5095K pin no. equivalent circuit description voltage 24 pin24; vif input pin-1 ac 25 pin25; vif input pin-2: f = f p balanced input by vif amp. input. dc level approx. 2.7 v 26 ? gnd: dc for vif and sif circuit. 27 rf agc output pin: dc open collector output and usable at any bias value (12 v max.). 28 audio output pin ac 0 khz to 20 khz 29 de-emphasis pin: ac de-emphasis filter pin for sound detection 0 khz to signal. 20 khz external c for pal/ntsc is the same (internal impedance changes). pal: 12 k w //60 k w 1 200 pf = 48 m s ntsc: 60 k w 1 200 pf = 72 m s n terminal equivalent circuits (continued) 5 v (v cc3 ) 25 24 saw 150 m a 150 m a 27 k w 1.2 k w 1.2 k w 3.5 v 5 v (v cc3 ) rf agc control bias 1f agc bias to tuner 40 k w 27 9 v (v cc1 ) 100 m a 400 m a 270 w 28 9 v (v cc1 ) 1.7 k w 1200 pf 29 100 m a 60 k w 120 k w ntsc pal detection output
22 AN5095K ics for tv pin no. equivalent circuit description voltage 30 aft output pin: dc offset of center voltage is adjusted by using bus. when aft defeat sw is turned on (09 = 00), v 30 becomes a value determined by external resistor-divider. m of aft is variable by impedance of external resistor. 31 external video input signal pin: ac external video signal input pin and dc cut 1 v[p-p] input. (compost) typical 1 v[p-p]. dc approx. 2.0 v 32 decoupling pin: dc s-curve inside the ic is broad-band. however, dc feedback should be applied so that dc voltage of output signal becomes constant. dc level (4.5 v typ.). f s ? high: v 32 ? low 33 sif signal input pin: ac + dc used in common as dc input pin for ac sharpness control. f = f s dc bias is applied from outside (for sharpness control dc: 5 v to 7 v). 9 v (v cc1 ) 1.1 k w 1.1 k w 40 k w 1.1 k w 1.1 k w 30 9 v to tuner 350 ma max. 9 v (v cc1 ) 31 100 m a 50 k w 30 k w 3.4 v 50 m a 10 m f to video sw ext. video 9 v (v cc1 ) 10 k w 32 10 m f 1.7 k w 20 k w 1.7 k w 13 m a 100 m a 3 k w 3 k w 4.5 v typ. 9 v (v cc1 ) 33 200 m a 100 m a 100 m a 30 k w 30 k w 10 pf 1.8 k w sif in 4.4 v 5 v to 7 v 9 v to sif limitter amp. sharpness contorol n terminal equivalent circuits (continued)
23 ics for tv AN5095K pin no. equivalent circuit description voltage 34 sif internal power supply stabilization filter dc pin 1.24 v 35 sif signal input pin: ac + dc input pin for sif2 and internally biased. ac f = f s dc 3.0 v 36 sif signal input pin: input pin for sif1 and internally biased. 37 if agc filter pin: dc if agc filter pin. the current obtained from approx. 2 v peak agc circuit is smoothed by an external capacitor. when c goes smaller, the respons charaeteristic becomes faster but the sag tends to appear easily. 38 internal video input pin 1: ac input pin for the signal detected by vif 1 v[p-p] circuit (internal video signal). (compost) dc cut input. typical 1 v [p-p] dc level approx. 1.6 v n terminal equivalent circuits (continued) 5 v (v cc3 ) 34 56 m a 53 k w 1.24 v 1 m f to sif pll 9 v (v cc1 ) 9 v 3.7 v 200 m a 100 m a 100 m a 1.8 k w 30 k w 30 k w 40 k w to sif limitter amp. pin 35, 36 sif in 5 v (v cc3 ) 30 m a 0.47 m f 37 to if amp. 9 v (v cc1 ) 680 k w 30 k w 3.0 v 50 m a 10 m f to video sw int. video pin 38, 40
24 AN5095K ics for tv pin no. equivalent circuit description voltage 39 sif apc filter pin: dc filter pin for sif apc circuit. 40 internal video input pin 2: ac input pin for the signal detected by vif 1 v[p-p] circuit (internal video signal). (compost) dc cut input. typical 1 v[p-p]. dc level approx. 1.6 v 41 vif detection output pin: ac adjust at 2 v[p-p] by i 2 c bus (upper 4-bit of 2 v[p-p] 0 a is used). note) at av mode, vif detection signal output is not given. 42 apc1 filter pin: dc filter pin for apc1 circuit of vif. approx. 2.5 v lock detection circuit of vco is built in the ic inside and the time constant of apc filter is changed over. when locked sw: 0 when not locked sw: 1 n terminal equivalent circuits (continued) 9 v (v cc1 ) to audio sw 72 m a 200 m a 800 m a 39 8.4 k w 13 k w 7.5 k w 5.6 k w p.c. vco (4 mhz to 7 mhz) 1 000 pf 2 pf 9 v (v cc1 ) 75 m a 41 5 v (v cc3 ) 75 m a 0.47 m f 25 m a to vco 50 m a 3.25 v sw 1 0 42 20 k w 500 w 150 w 9 v (v cc1 ) 680 k w 30 k w 3.0 v 50 m a 10 m f to video sw int. video pin 38, 40
25 ics for tv AN5095K pin no. equivalent circuit description voltage 43 vif oscillation pin: ac depending on vif frequency, change f = f p /2 oscillation coil. approx. the oscillation frequency is 1/2 of f p . 0.7 v[p-p] dc level approx. 3.9 v 44 video output pin: ac this pin outputs int.video 1, int. video 2 or 2 v[p-p] ext. video signal selected by av sw. dc level approx. 4.5 v 45 video input pin: ac input pin for video signal (composite video 0.6 v[p-p] also available). typical input 0.6 v[p-p]. sync. top is clamped at 3.5 v. the video signal should be inputted with low impedance. 46 vertical and horizontal sync. separation ac input pin: 2 v[p-p] sync. top is clamped at 1.3 v. 47 ? v cc3-2 (5 v typ.) dc for chroma jungle circuit. 5 v 9 v (v cc1 ) 50 m a 400 m a 44 9 v (v cc1 ) 43 k w 47 k w 1.8 k w 4.3 v 50 m a 10 m a 45 5 v (v cc3 ) 1.3 v 16 k w 2 v[p-p] 16 k w to h-sync. sep. v-sync. sep. 270 w 20 m a 0.1 m f c h 1 200 pf r h 46 5 v (v cc3 ) 43 300 w 100 w 800 m a 400 m a 100 m a n terminal equivalent circuits (continued)
26 AN5095K ics for tv pin no. equivalent circuit description voltage 48 chroma signal input pin ac + dc black extension start point adjusting pin: burst pin 48 is chroma signal input pin, and the 150 mv[p-p] typ. black extension start point is adjusted by dc dc voltage applied from the outside. 4.5 v typ. 49 gnd: dc for video chroma jungle circuit. 0 v 50 fbp input pin: ac fbp input pin for horizontal blanking and fbp afc circuit. threshold level h-blk: 0.7 v afc: 1.9 v it becomes all blanking when dc 1.3 v is applied from the outside. 51 horizontal stabilized power supply pin: dc stabilized power supply for starting up the 6.3 v horizontal circuit that has a zener circuit inside. 52 horizontal afc2 filter pin: dc comparing the phase of fbp and that of 1.5 v to inside pulse of the ic, charge to and dis- 3.5 v charge from the capacitor connected to pin 52 are done. performed by charging and discharging in dc current by the screen center position adjusting dac. v 52 changes depending on the time from h-out to fbp, and the slice level of internal sawtooth waveform changes. n terminal equivalent circuits (continued) 51 v cc2 i 51 15 ma typ. 47 m f to hor. osc 6.3v i 51 v 51 6.3 v (v cc2 ) 3.3 v 1.9 v v 52 500 m a max. 1 k w 2 k w 1 k w 2 k w 50 m a 0.022 m f 52 from dac (hor. position) to hor. out afc2 detecter i 40 k w 40 k w 5 v (v cc3 ) 50 100 m a 50 m a 1.9 v 0.7 v to afc to h-blk 60 k w 24 k w 100 m a 50 m a 50 m a 5 v (v cc3 ) 1 000 pf 48 50 m a 2.5 v 9 v (v cc1 ) to chroma amp. chroma signal to black level expansion 25 m a 100 m a 15 k w 12.5 pf 9 v 10 k w 10 k w
27 ics for tv AN5095K pin no. equivalent circuit description voltage 53 horizontal afc1 filter pin: dc comparing the phase of horizontal sync. 4.3 v typ. signal and that of inside pulse of the ic, charge to and discharge from the capacitor connected to pin 53 are done. r1, r2, c1, and c2 are lag-lead filter for afc1. 54 horizontal oscillation pin: ac oscillate at 32 f h ? 503 khz by means of f = 32 f h ceramic oscillator. ( approx. ) horizontal and vertical pulse are generated 503 khz by means of count down circuit in the ic. 55 overvoltage protection input pin: dc input pin for the protect circuit against x-ray normally due to overvoltage. 0 v shut-down is started by internal logic circuit when h-out pulse is low. (prevent the horizontal drive tr destruc- tion.) 56 horizontal pulse output pin: ac duty cycle is approx. 36%. pulse n terminal equivalent circuits (continued) 20 k w 40 k w 6.3 v (v cc2 ) 55 20 k w 20 k w 3 v 4.3 v to count down 19 k w 2.8 v 0 v hor. out 50 w 40 k w 10 k w 6.3 v (v cc2 ) 4.3 v 56 80 m a 6.3 v (v cc2 ) 200 m a 100 m a 220 pf 54 10 k w 300 w 22 k w 10 k w hor. sync. 1 000 m a 6.3 v (v cc2 ) 4.3 v 1.5 v 200 m a 820 w r2 22 m f c2 0.033 m f c1 53 27 k w r1 27 k w afc1 detecter hor. osc horizontal b curve f h v 53
28 AN5095K ics for tv pin no. equivalent circuit description voltage 57 vertical sync. signal clamp pin: ac peak clamp pin for separating vertical sync. f = f v signal. although the integral amount of vertical sync. signal itself has been determined by the internal time constant, the trigger application timing is determined by selecting external constant r1, c1. r1 must be used at higher than 200 k w . r2 is resistor for emitter current restriction. 58 vertical pulse output pin: ac negative polarity, pulse width of 10h. pulse 59 secam interface pin: ac+dc input and output pin for interfacing with ac secam ic. 250 mv[p-p] it becomes the secam mode when the or 0 mv[p-p] current sink from pin 59 is 100 m a or more. dc 4.4 v at secam or 1.1 v dc 4.4 v + ac 250 mv[p-p] at non-secam dc 1.1 v + ac 250 mv[p-p]: 4.43 mhz or 0 mv[p-p]: 3.58 mhz 60 pin60; -(b-y) output pin ac 61 pin61; -(r-y) output pin: -(b-y) the output circuit turns off at secam and becomes a high impedance state. outputs to 1hdl. -(r-y) dc level approx. 2.1 v n terminal equivalent circuits (continued) 2.5 k w 5 v (v cc3 ) 0 v 1.5 k w 1.5 k w 60 100 m a 61 -(b-y) -(r-y) to 1hdl 100 m a 100 m a secam secam 50 k w 9 v (v cc1 ) f c 59 12 k w 50 m a 100 m a 200 m a 12 k w 56.2 k w 13.7 k w 61.5 k w to secam ic secam detecter secam secam 5 v (v cc3 ) r1 330 k w r2 200 w 270 w 50 k w 3 k w 16 k w 4 k w 57 4.3 v to ver. count down 220 w c1 0.33 m f 4.3 v 0 v 50 k w 43 k w 5 v (v cc3 ) 58
29 ics for tv AN5095K pin no. equivalent circuit description voltage 62 sand-castle pulse output pin: ac the sand-castle pulse is outputted to 1hdl pulse and secam ic. 63 pin63; -(b-y) input pin ac 64 pin64; -(r-y) input pin: -(b-y) the color difference signal outputted from 1hdl is inputted. the pedestal level is clamped at 4 v by means of clamp circuit. -(r-y) dc level 4 v n terminal equivalent circuits (continued) 4.7 v 2.4 v 5 v (v cc3 ) 44 k w 63 k w 42 k w 15 k w 37 k w 62 v-blk h-blk bgp 9 v (v cc1 ) to color circuit from 1hdl 200 m a 100 m a pin 63, 64 ccp n usage notes 1. the following terminals are not strongly resistant to surge latch-up. the precautions should be observed when using the ic. 1) serge the + side breakdown voltage of pin 22 and pin 23 is approx. 190 v if the surge source capacitance is 200 pf. the + side breakdown voltage of pin 45 is approx. 160 v if the surge source capacitance is 200 pf. therefore, do not apply a surge stronger than that. 2) latch-up for pin 18, pin 21, pin 22, pin 51, pin 54, pin 55 and pin 56, the latch-up occurs by the + side surge of approx. 150 v (surge source capacitance 200 pf). therefore, do not apply a surge stronger than each voltage indicated for each pin. note) the stronger surge common to the above 1) and 2) means that the establishment of either one of the following two cases; the surge source capacitance is larger than the indicated value or the surge voltage is higher than the indicated value.
30 AN5095K ics for tv n usage notes (continued) 2. the protection diode of each pin is as shown in the following table; pin 2728293031323334353637383940414243444546474849505152 with ( l ) or without v cc llllllllllllllllllll l l l ( ) surge diode gnd llllllllllllllllllll l l l v cc node being connected 11111113113111133311 3 3 2 v cc gnd gnd side diode v cc side diode v cc node 1 ? v cc1 (9 v system) 2 ? v cc2 (6.5 v system) 3 ? v cc3 (5 v system) pin 535455565758596061626364 with ( l ) or without v cc llllllllllll ( ) surge diode gnd llllllllllll v cc node being connected 222233133311 pin 1234567891011121314151617181920212223242526 with ( l ) or without v cc lllllllllllll llll l ll ( ) surge diode gnd lllllllllllll llll l ll v cc node being connected 1113333311111 1112 1 33 n technical information explanation of each block 1. vif 1) adapting the inter carrier pll coherent detection method. 2) the vco of vif is controlled by i 2 c bus (7-bit): oscillation at 1/2 of the f p frequency. (2 times multiplier circuit is inside.) built-in double apc circuit of frequency and phase. 3) aft without coil: it is applicable to both vs and fs tuners by amplifying the error voltage of apc and making s-curve to obtain aft output. the dc offset is controlled by i 2 c bus (9-bit). the aft defeat is also possible. 4) since the vco oscillates at 1/2 frequency, a high-frequency disturbance such as tweet is reduced. 5) the video detection output is 2.0 v[p-p] typical: the level adjustment is carried out by i 2 c bus . 6) the built-in lock detection circuit realizes a stable pulling by the changeover of time constant for apc. 7) the delay point of rf agc is adjusted by i 2 c bus (6-bit). 2. sif 1) the sif detection uses pll coherent detection method. 2) 4 frequencies are changed over for use as the vco oscillation frequency. at ntsc; 4.5 mhz at pal; 5.0 mhz, 5.5 mhz, 6.5 mhz 3) it is possible for the sif detection output to deal with the difference in deviation of pal/ntsc by changing over an amplifier of + 6 db. 4) built-in video/sif sw. video sw; 2 systems (with 6 db amp.) sifsw; 3 systems
31 ics for tv AN5095K n technical information (continued) explanation of each block (continued) 3. video 1) the delay line aperture control (contours emphasis type) is used for sharpness control. the circuit as well as the black extension circuit realizes a high picture quality. 2) built-in pedestal clamp filter. 3) service sw: (y contrast min., vertical output stop). 4. chroma 1) the circuit realizes an adjustment free condition by using base band 1hdl (externally attached). 2) incorporation of acc filter reduces the number of external components. 3) it is possible to support the other systems by the mode changeover i 2 c bus (1) pal/ntsc, (2) 4.43 mhz/3.58 mhz, (3) forced pn/forcedsecam. 4) equipped with the killer output terminal for system discrimination by microcomputer. (when killer is on ? 0 v, killer is off ? 5 v) 5) the color difference output terminal becomes a high impedance state at secam. 6) since the circuit is provided with the color difference input terminal, the features of ics such as the an5244 (ic for color signal compensation) can be connected. 7) pal/ntsc, secam interface (pin 59) note) * : ac component of 4.43 mhz is outputted in the vertical sweep period only. 250 mv[p-p] input approx. dc 4.6 v pin 59 v-blank (r, g, b out) v-sync. mode dac (3.58 mhz/4.43 mhz) pin59 output f c ac level pal/ntsc 3.58 mhz approx. 1.3 v 3.58 mhz cw output 4.43 mhz approx. 1.3 v 4.43 mhz 250 mv[p-p] secam 3.58 mhz approx. 4.6 v 4.43 mhz 250 mv[p-p] output for v-blank 4.43 mhz approx. 4.6 v 4.43 mhz 250mv[p-p] period only * 5. rgb 1) it supports not only the osd but also the teletext signal in an analog input system. (the output level is interlocked with the contrast of tv signal side.) 2) the white balance (drive, cut-off) adjustment is performed by i 2 c bus. 6. jungle 1) the horizontal circuit uses the count down method by 32 f h ceramic oscillator. the afc circuit uses double method. 2) by the adaption of trigger method count down circuit, the vertical circuit can obtain a stable vertical synchro- nization without adjustment at all times. the output is pulse signal, so that there is no degradation of interface due to the influence of pattern layout.
32 AN5095K ics for tv n technical information (continued) explanation of each block (continued) 6. jungle (continued) 3) built-in frequency discrimination circuit: the circuit outputs the judgment results of 50 hz/60 hz in accor- dance with the frequency of the vertical synchronizing signal. (60 hz ? high) 4) the output holds the previous state when the input frequency is 45 hz or less and 65 hz or more, and the output changes for the first time when judged as 50 hz or 60 hz for 3 consecutive vertical periods. 5) the horizontal detection circuit and x-ray protection circuit (shut-down method) are built in. 6) the screen center position is adjustable by the i 2 c bus. ( 1.6 m s) 7) for the blue-back in a weak electric field, the stable screen image is held by the vertical trigger off mode ( i 2 c bus). 7. i 2 c bus 1) incorporating 14 dac controls and 12 sws for eliminating the need for the adjustment of set mechanism. 2) provided with automatic increment function. ? sub address 0 *: automatic increment mode. (when data are sent in regular succession, sub address changes successively and data are inputted.) ? sub address 8 *: (when data are sent in regular succession, data are inputted with the same sub address.) 3) i 2 c bus protocol ? slave address: 10 001 010 (8ah) ? slave address format s slave address 0 a sub address a data byte a p start write acknowledge bit stop condition condition 4) sub address byte and data byte format the description in ( ) shows the initial state. data byte sub address d7 d6 d5 d4 d3 d2 d1 d0 00 p/n pn/s color (21h) (0 ? p) (0 ? pn) 01 ver. auto ver. trg tint (21h) (0 ? auto) (0 ? normal) 02 ver. osc brightness (41h) (0 ? 50) 03 sif video contrast (21h) sw sw 04 cut off r (81h) 05 cut off g (81h) 06 cut off b (81h) hold 45 55 65 hold 50 hz (low) input frequency judgement output voltage (high) 60 hz
33 ics for tv AN5095K n technical information (continued) explanation of each block (continued) 7. i 2 c bus (continued) 4) sub address byte and data byte format (continued) the description in ( ) shows the initial state. 5) contents of i 2 c bus control (1) the control information is in the direction that the output increases when the datum increases. (example: contrast 00 ? contrast min. , 3f ? max. , brightness 00 ? pedestal level low, 7f ? high) (2) supplement of other control a. 00: color when data are 00, the color becomes off since the chroma output is decreased completely . b. 01: tint data 00 ? skin color tends to become reddish, 3f ? skin color tends to become greenish. c. 04, 05, 06: cut off r, g, b 8-bit dac d. 07, 08: driver r, b 7-bit dac e. 09: aft offset adjustment the dc offset of s-curve of aft output is corrected. data 01 ? s-curve falls (dc voltage of center frequency drops). data ff ? s-curve rises. it becomes aft defeat mode when data 00, the voltage of aft out (pin 30) becomes the value in accordance with the external resistor. aft changes over 8-bit dac into 2 stages for variable range and improvement of precision for per 1-bit. example: in the case of aft data byte sub address d7 d6 d5 d4 d3 d2 d1 d0 07 sif vco drive r (41h) sw1 08 chroma drive b (41h) vco (0 ? 4.43) 09 aft (01h) offset 0a 50 hz/60 hz secam det. rf agc (21h) killer out sw delay sw 0b sif/ext. video sif vco h center (45h) sw adjust sw2 0c aft offset vif vco (c1h) sw 0a: 0c-d7: 00 ff 00 ff data 0 0, 1 1 overlap approx. 1/8 output
34 AN5095K ics for tv n technical information (continued) explanation of each block (continued) 7. i 2 c bus (continued) 5) contents of i 2 c bus control (continued) (2) supplement of other control (continued) f. 0a: rf agc delay point adjustment the same operation as when bias is applied from outside conventionally. data 00 ? dc-applied bias drops ? delay point rises data 3f ? dc-applied bias drops ? delay point down g. 0b: video adjustment data 0* ? detection output min. 7* ? max. to be used for correcting the dispersion of detection output inside the ic. h. 0b: hor. screen image position data *0 ? screen image goes to the left 7 * ? screen image shifts to the right. i. 0c: vco control fine control for the oscillation frequency of vco (1/2 frequency of f p ) of vif. 8. supplementary explanation of sw operation data-bit sw contents concrete contents 00-d7 pal/ntsc mode sw 1) bgp width changeover (pal: wide) (0 ? pal) 2) cw changeover to killer (pal: 90 deg./270 deg.) (1 ? ntsc) 3) tint operation changeover (pal: tint off) 4) ident operation changeover (pal: with operation) 00-d6 pal, ntsc/secam mode sw 1) demodulation output mode changeover. (1 ? forced secam) the color difference output terminal becomes high (0 ? normal discrimination mode) impedance at forced secam. 01-d7 ver. auto sw 1) vertical frequency discrimination circuit changeover. (0 ? auto changeover) auto changeover: automatic discrimination mode by (1 ? manual changeover) internal counter. manual changeover: forcibly changeover 50 hz/60 hz by 02-d7 data. 01-d6 ver. trg stop sw 1) vertical trigger input inhibit sw. (0 ? normal) 1 ? trigger input-off is the mode to protect from the (1 ? trigger off) vertical dancing caused by noise at blue-back . 02-d7 ver. osc sw 1) vertical frequency changeover sw. (0 ? 50 hz) valid only when 01-d7 is 1. (1 ? 60 hz) 03-d7 sif, external av input changeover switch 0b-d7 03-d7 0b-d7 output signal 0 0 sif1 (int.) power on time 0 1 sif2 (int.) 1 0 sif3 (int.) 1 1 ext. (video) int. is set at sif1
35 ics for tv AN5095K n technical information (continued) explanation of each block (continued) 8. supplementary explanation of sw operation (continued) data-bit sw contents concrete contents 03-d6 video input changeover switch 03-d6 input signal 0 video1 power on time 1 video2 08-d7 chroma vco sw 1) chroma oscillation circuit changeover. (0 ? 4.43 mhz) (1 ? 3.58 mhz) 0a-d7 50 hz/60 hz, killer, secam det. out switch 0a-d6 0a-d6 0a-d7 output signal 0 0 50 hz/60 hz out power on time 0 1 killer out 1 0 secam det. out output mode 50 hz/60 hz out killer out secam det. out h (5 v) 60 hz off (color) secam l (0 v) 50 hz on (b/w) no secam 07-d7 sif vco free-running frequency, de-emphasis 0b-d3 detection output gain changeover switch 07-d7 0b-d3 de-emphasis/gain oscillation frequency of vco sif input terminal 1 0 ntsc 4.5 mhz (power on time) ? 1 1 pal 5.5 mhz ? 0 0 pal 6.0 mhz ? 0 1 pal 6.5 mhz ? 0c-d7 aft offset sw 1) for aft 2-stage changeover. (0 ? without offset) (power on preset: aft offset sw ? 1) (1 ? with offset) 2) aft defeat. defeat comes ettective only when 0c-d7 = 0, dac(09) = 00.
36 AN5095K ics for tv n application circuit example 1 2 3 4 5 6 7 8 9 10 11 12 13 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 14 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 9 10 11 12 13 15 16 14 8 7 6 5 4 2 1 3 mn3868(1h dl) - (r - y) - (b - y) 0.1 m f 0.1 m f 0.1 m f 33 pf 82 m h 82 m h 33 pf 0.01 m f 0.01 m f in scp - (b - y) out - (r - y) out 0.1 m f 0.1 m f 2.2 m f 680 k w secam interface v-out 8.2 m h 33 pf 0.1 m f x-ray protect. afc1 afc2 fbp in 100 pf 120 pf 4.7 m h 1.2 k w det. out sync. in 2 v[p-p] 9 v 9 v vosc apc1 agc 1 v[p-p] gnd hosc 0.01 m f 0.047 m f 0.047 m f 820 w 5 v 9 10 11 12 13 15 16 14 8 7 6 5 4 2 1 3 secam 51 w ve r. clamp h-out video out video in 0.22 m f 0.1 m f 47 m f 0.022 m f (8 v) 1 2 3 4 5 1 3.58/4.43 on 2 10 k w 10 kb w 47 pf 2.2 k w 3 2 1 220 w 220 pf 820 w 180 w 3.3 k w 10 k w c in 10 k w 1.8 k w 10 m f 270 w 910 w 910 w 680 k w 2 k w 1 k w 150 w 1200 pf 0.47 m f 1000 pf 0.47 m f 10 m f 5.1 k w 10 kb w 0.01 m f 0.01 m f 0.01 m f video out y in 2.2 k w 1.8 k w 1 k w 30 pf 56 m h 10 k w 10 m f 0.033 m f 47 m f 1000 pf 47 m f 0.1 m f 1200 pf 0.022 m f v cc2 v cc3 5 v 10 k w (vcj) (vcj) 9 v trap&dl (340 nsec 35 nsec) 150 pf 2.7 m h 10 k w 3.58 mhz trap 130 k w 680 k w 5.5 m h trap 12 h int. v2 int. v1 apc sif sif1 in sif2 in sif3 in sharpness ext.audio in sharpness 6.5 m h 10 m f 910 w 470 w 470 w 910 w 6.0 m h bpf 470 w 470 w bpf 470 w bpf 470 w 4.5 mhz 6.5 mhz 5.5 mhz /6.0 mhz v cc3 = 5 v 0.022 m f 33 k w 2.2 m f 0.47 m f 0.047 m f 4.7 m f 180 k w 1 m w 12 pf 15 pf 1 m w apc r 0.022 m f g clamp filter killer out 50 hz/60 hz out secam det. out killer 0.022 m f 0.47 m f 0.47 m f 0.47 m f 0.47 m f r y s b l det. b u-com 4.43 mhz 3.58 mhz 567 4 3 2 1 g b r 47 m f 1.5 k w g 1.5 k w b 1.5 k w 5 v cc1 (9 v) hor. lock det. 4 3 2 1 0.022 m f 4.7 m f 0.01 m f 0.01 m f v cc3 (vif/sif) gnd (rgb/dac) acl sda scl 1 m w 4.7 k w 4.7 k w 1.2 m h 39 k w 150 k w 150 k w 75 w 6.8 k w 8.2 m h 0.01 m f 1200 pf 10 m f 910 w 1 k w 7.5 k w 56 w 3.6 k w 10 k w 1 2 3 4 1 2 0.01 m f 47 m f 0.01 m f 10 m f 10 m f de-emphasis decoupling aft saw 0.39 m h gnd (vif/sif) rf agc audio out 4 3 1 2 ext.video 15 k w 15 k w 10 kb w 47 m f 10 m f 10 m f 10 m f 10 m f 10 m f 10 m f + b (12 v) agc bh bt bu tu1 bl aft bm 1f sw1 band sw an78m05 47 m f 47 m f 100 m f v cc1 = 9 v an78m09 1.8 k w 1 2

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